파이프라인형 수퍼컴퓨터에서의 컴파일링 최적화 연구

Abstract

본 논문은 파이프라인형의 수퍼 컴퓨터에서 효율적인 컴파일링을 통한 병렬성을 향상시키기 위한 기법으로 스칼라 컴파일링 기법인 소프트웨어 파이프라이닝(Software Pipelining)과 루프 펼침(Loop Unrolling)기법을 채택하여 성능향상을 꾀하고자 한다. 또한 다중 명령어 발생 기법의 성질과 구조를 고찰한 뒤, 프로그램 상에 오버헤드를 제거한다.

This paper studies new compilation techniques for enhancing performance in high-speed superpipelined processors using both software pipelining and loop unrolling. The discussion of the machine parallelism is based on the concepts of superscalar and superpipelined machines. By examining the structure and characteristics of these multiple-instruction-issue schemes, we can isolate potential overhead sources, and propose compiling enhancements that reduce their impact on performance.

This paper studies new compilation techniques for enhancing performance in high-speed superpipelined processors using both software pipelining and loop unrolling. The discussion of the machine parallelism is based on the concepts of superscalar and superpipelined machines. By examining the structure and characteristics of these multiple-instruction-issue schemes, we can isolate potential overhead sources, and propose compiling enhancements that reduce their impact on performance.