새로운 Domino CMOS PLA 設計 및 故障檢出

Abstract

本 論文은 PLA의 AND 어레이와 OR 에레이를 各各 NMOS와 PMOS를 使用하여 構成하고 inverter를 除去하여 回路를 單純化시키면서 Domino CMOS의 特性을 그대로 維持하는 새로운 設計 方法을 提案한다. 또한 이 回路內에 存在하는 모든 트랜지스터에 대한 Stuck-open 故障을 PLA의 規則性을 살린 連結그래프를 利用하여 效率的으로 檢出할 수 있게 하였다. 전체적인 알고리즘을 PASCAL로 實現하여 임의의 設計된 Domino CMOS PLA에 대하여 Stuck-open 故障 檢出이 可能함을 立證하였다.

This paper proposes a new Domino CMOS PLA (NDCP) design method which has the same characteristic of Domino CMOS circuits. In this method AND array and OR array are constructed by NMOS and PMOS respectively and inverter is removed.

Also, in order to detect Stuck-open faults which essentially exist in CMOS circuits, the effective method in generating the connection graph is proposed by considering the systematic structure of the PLA.

It is shown that all of Stuck-open faults in the PLA circuit can be detected by applying arbitrary NDCP to the algorithm using the connection graph.

This paper proposes a new Domino CMOS PLA (NDCP) design method which has the same characteristic of Domino CMOS circuits. In this method AND array and OR array are constructed by NMOS and PMOS respectively and inverter is removed.

Also, in order to detect Stuck-open faults which essentially exist in CMOS circuits, the effective method in generating the connection graph is proposed by considering the systematic structure of the PLA.

It is shown that all of Stuck-open faults in the PLA circuit can be detected by applying arbitrary NDCP to the algorithm using the connection graph.